1. Field of the Invention
The present invention relates to an apparatus for manufacturing semiconductor devices, a method of manufacturing the semiconductor devices, and a semiconductor device manufactured by the apparatus and method.
2. Description of the Prior Art
In general, when manufacturing a semiconductor device, a semiconductor chip is mounted on top of a substrate, and then a process for connecting the semiconductor chip and the substrate is carried out by soldering.
In the prior art, this kind of process is carried out by a method like that disclosed in Japanese Laid-Open Patent Application No. H 11-97839 (see lines 14 to 24 in the left column of page 10), for example.
Namely, using a mounter, a semiconductor chip (semiconductor component) is mounted on top of a substrate (that is, a substrate for mounting semiconductor components), and then the substrate having the semiconductor chip mounted thereon is conveyed through the inside of a reflow furnace to melt and solidify solder provided at the terminal portions of the substrate. In this way, the semiconductor chip and the substrate are connected to manufacture a semiconductor device. However, in this method, after the semiconductor chip is mounted on the top of the substrate, the substrate is conveyed to the reflow furnace. At that time, there are cases where the position of the semiconductor chip is dislocated due to vibration and the like. Further, the substrate normally has a shape in the form of a long plate-shaped frame, and in this case, when connecting the semiconductor chip and the substrate, there are many cases where the substrate and the semiconductor chip are subjected to a very large heat energy compared with the heat energy required to melt the solder. Namely, when the substrate has such a long plate shape, a relatively long time is required for the substrate to pass through the reflow furnace, and this makes the heat energy (heat history) received by the substrate and the semiconductor chip become larger than necessary. As a result, warping and the like can easily occur in the substrate, and there is the possibility that the semiconductor chip will experience adverse effects.
When this kind of dislocation, warping and the like occur, a poor solder connection is easily created between the substrate and the semiconductor chip, and this lowers the yield of semiconductor devices. Further, there is also the problem of lowering reliability of manufactured semiconductor devices.
Further, in recent years, the trend to create high functionality in electronic devices such as portable telephones and the like has become increasingly widespread. In accordance with this trend, there is a tendency that seeks for higher functionality demanded in semiconductor devices such as LSI and the like provided in electronic devices, but the effort to provide all functions demanded for these semiconductor devices in a single chip causes various problems such as long development periods and increased development costs for the semiconductor devices. In this regard, in order to solve these problems, semiconductor devices having a module structure in which semiconductor packages such as different types of LSI or the like are laminated and integrated have been used. However, the same problems described above also occur in the manufacturing of semiconductor devices having this kind of module structure.